发明名称 |
Uniform exposed raised structures for non-planar semiconductor devices |
摘要 |
The use of two different materials for shallow trench isolation and deep structural trenches with a dielectric material therein (e.g., flowable oxide and a HARP oxide, respectively) causes non-uniform heights of exposed portions of raised semiconductor structures for non-planar semiconductor devices, due to the different etch rates of the materials. Non-uniform openings adjacent the exposed portions of the raised structures from recessing the isolation and dielectric materials are filled with additional dielectric material to create a uniform top layer of one material (the dielectric material), which can then be uniformly recessed to expose uniform portions of the raised structures. |
申请公布号 |
US9362176(B2) |
申请公布日期 |
2016.06.07 |
申请号 |
US201414319640 |
申请日期 |
2014.06.30 |
申请人 |
GLOBALFOUNDRIES INC. |
发明人 |
Yu Hong;Shen HongLiang;Lun Zhao;Hu Zhenyu;Carter Richard J. |
分类号 |
H01L21/8234;H01L27/088;H01L29/06;H01L21/762;H01L21/306 |
主分类号 |
H01L21/8234 |
代理机构 |
Heslin Rothenberg Farley & Mesiti P.C. |
代理人 |
Reinke, Esq. Wayne F.;Heslin Rothenberg Farley & Mesiti P.C. |
主权项 |
1. A non-planar semiconductor structure, comprising:
a semiconductor substrate; a plurality of raised semiconductor structures coupled to the substrate, a non-uniform layer of isolation material surrounding bottom portions of the plurality of raised semiconductor structures; at least one trench through the non-planar structure and into the substrate, the at least one trench filled with only a dielectric material different from the isolation material and having a different etch rate than the isolation material for a given etch; and wherein a top layer of the dielectric material is situated above the non-uniform layer of isolation material and in the at least one trench, and wherein a top surface of the top layer has a uniform height below uniform exposed portions of the plurality of raised semiconductor structures. |
地址 |
Grand Cayman KY |