| 摘要 |
PROBLEM TO BE SOLVED: To provide a data signal generating apparatus capable of synchronizing serial conversion processing with respect to a delay at a data output section that generates parallel data, even when a jitter component is added to a data signal.SOLUTION: A data signal generating apparatus 10 includes: a data output section 11 outputting parallel data and a data synchronization clock signal CKp synchronized with the parallel data; a multiplexer 13 receiving the parallel data to output a data signal at a rate of a reference clock signal CK1; a phase comparator 21 that compares the phase of the data synchronization clock signal CKp and the phase of a divided clock signal A to output a detection signal; a comparison timing instruction section 22 instructing a comparison timing in the phase comparator 21 at random; an averaging section 24 calculating an average voltage of voltages of the detection signal; a control section 25 generating a control signal in accordance with the average voltage; and a variable delay unit 30 that imparts a delay in accordance with an amount of the control signal to the reference clock signal CK1.SELECTED DRAWING: Figure 1 |
