发明名称 |
Programming current limiter for source-side injection EEPROM cells |
摘要 |
A flash memory EEPROM device with a programming current limiting ability operates with six terminals and includes a source-side injection cell and a current limiter in series with the cell at a source region of the cell. During programming, an upper current limit is established for the overall channel current through the cell by controlling the voltage on a serial-gate of the current limiter. A second embodiment of a flash memory EEPROM device is structured with only four operating terminals, and includes a current limiting transistor integrally merged with a source-side injection cell. Merger is accomplished by eliminating the source junction of the injection cell and by combining the select-gate of the injection cell with the serial-gate of the current limiting transistor to create a conjoint select-gate. The unified channel under the conjoint select-gate consists of two channel sub-sections with different threshold adjustment implants and thus different threshold voltages. The first sub-section of this unique channel, adjacent to the injection point of the cell, is doped with a lower threshold adjustment implant dose than that of the second channel sub-section, adjacent to the source of the memory device. The second channel sub-section, or appended channel, in accordance with the second embodiment is fabricated using a dedicated photoresist mask to dope the second sub-section of the select-gate channel with a higher threshold adjustment implant dose than that for the first sub-section.
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申请公布号 |
US5986941(A) |
申请公布日期 |
1999.11.16 |
申请号 |
US19970948145 |
申请日期 |
1997.10.09 |
申请人 |
BRIGHT MICROELECTRONICS, INC. |
发明人 |
PANG, CHAN-SUI;MA, YUEH YALE |
分类号 |
G11C16/04;H01L21/8247;H01L27/115;(IPC1-7):G11C7/00 |
主分类号 |
G11C16/04 |
代理机构 |
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主权项 |
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地址 |
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