发明名称 Method and system for analyzing a VLSI circuit design
摘要 A method is disclosed for analyzing a VLSI circuit design stored in a computer system. Each segment of the design layout is stored in the computer memory for analysis and implementation. An electronic computer-aided design (E-CAD) program is used to analyze the design. First, the E-CAD tool is run on the entire design or on a designated part thereof. The tool compares the design to specifications and returns a list of violations on a segment basis. The E-CAD tool identifies violations for the designer to fix through redesign or clarification of specifications. The method marks or flags signals of those segments reporting violations. After the designer has attempted to remedy the violations, the method reruns the E-CAD analysis on those signals that reported a violation during a prior run.
申请公布号 US2002112214(A1) 申请公布日期 2002.08.15
申请号 US20010782001 申请日期 2001.02.12
申请人 KELLER S BRANDON;ROGERS GREGORY DENNIS;LELM CHARLES A. 发明人 KELLER S BRANDON;ROGERS GREGORY DENNIS;LELM CHARLES A.
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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