| 摘要 |
PROBLEM TO BE SOLVED: To achieve sufficient high speed responsiveness, and to reduce input bias current as much as possible. SOLUTION: When voltage of a normal rotation input terminal IN+ becomes higher than that of an inverting input terminal IN-, transistors Q1, Q3, Q5, Q6 are turned on to make charged current to a capacitor Cc into I3. Furthermore, the voltage of the normal rotation input terminal IN+ becomes higher than the voltage of the inverting input terminal IN- by V<SB>BE</SB>, transistors QA2, QA3, QB1 are further turned on, the charged current to the capacitor Cc is increased to "I3+Ia" to achieve the high speed responsiveness. In this case, bias current flowing out to the inverting input terminal IN- is reduced by simultaneous turn-on of the transistors Q1, QB1. COPYRIGHT: (C)2008,JPO&INPIT
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