发明名称 Semiconductor test structures
摘要 A method performed using a resistive device, where the resistive device includes a substrate with an active region separated from a gate electrode by a dielectric and electrical contacts along a longest dimension of the gate electrode, the method comprising, performing one or more processes to form the resistive device, measuring a resistance between the electrical contacts, and correlating the measured resistance with a variation in one or more of the processes.
申请公布号 US9377503(B2) 申请公布日期 2016.06.28
申请号 US201414246405 申请日期 2014.04.07
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Tu An-Chun;Huang Chen-Ming;Wu Chih-Jen;Lin Chin-Hsiang
分类号 H01L27/00;G01R31/26;H01L21/66;G01R31/28 主分类号 H01L27/00
代理机构 Haynes and Boone, LLP 代理人 Haynes and Boone, LLP
主权项 1. A method for forming a resistive test structure, the method comprising: providing a semiconductor substrate with an active region; forming a gate stack over the active region; forming a first electrical contact in communication with the active region on opposing sides of the gate stack, the first electrical contact providing an electrical short across a first dimension of the gate stack without being positioned directly above the gate stack; and forming a second electrical contact in communication with the active region on the opposing sides of the gate stack, the second electrical contact providing an electrical short across the first dimension of the gate stack, the first and second electrical contacts spaced along a second dimension of the gate stack perpendicular to the first dimension.
地址 Hsin-Chu TW