SCAN DRIVER

摘要

There is provided a scan driver. The scan driver includes stages. An ith (i is a natural number) stage circuit includes an output unit, a controller configured to control the voltage of the second node in response to a kth (k is a natural number) clock signal supplied to a second input terminal, and an input unit configured to control the voltages of the first node and the second node in response to a carry signal of a previous stage that is supplied to a third input terminal and a carry signal of at least one next stage. The kth clock signal maintains a gate on voltage at a point of time at which a voltage of the jth clock signal is changed to a gate on voltage.

主权项

1. A scan driver comprising stages respectively connected to scan lines to output one of a plurality of clock signals as a scan signal,
wherein an ith (i is a natural number) stage circuit among the stages comprises: an output unit configured to supply an ith carry signal to a first output terminal and supply an ith scan signal to a second output terminal by using a jth (j is a natural number) clock signal supplied to a first input terminal in response to voltages of a first node and a second node; a controller configured to control the voltage of the second node in response to a kth (k is a natural number) clock signal supplied to a second input terminal; and an input unit configured to control the voltages of the first node and the second node in response to a carry signal of a previous stage that is supplied to a third input terminal and a carry signal of at least one subsequent stage, and wherein the kth clock signal maintains a gate on voltage when a voltage of the jth clock signal is rising from a gate off voltage to a gate on voltage.