发明名称 半導体装置
摘要 A semiconductor memory device or a semiconductor device which has high reading accuracy is provided. A bit line, a word line, a memory cell placed in an intersection portion of the bit line and the word line, and a reading circuit electrically connected to the bit line are provided. The memory cell includes a first transistor and an antifuse. The reading circuit includes a pre-charge circuit, a clocked inverter, and a switch. The pre-charge circuit includes a second transistor and a NAND circuit. The semiconductor memory device includes transistor in each of which an oxide semiconductor is used in a channel formation region, as the first transistor and the second transistor.
申请公布号 JP5984902(B2) 申请公布日期 2016.09.06
申请号 JP20140235403 申请日期 2014.11.20
申请人 株式会社半導体エネルギー研究所 发明人 齋藤 利彦;高橋 康之
分类号 H01L27/10;G11C17/14;H01L21/8234;H01L27/088;H01L29/786 主分类号 H01L27/10
代理机构 代理人
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