摘要 |
A new structure for an echo IC that employs a DRAM, so as to have the function of a shift register. The number of transistors in a storage cell is reduced, and only a single type of transistor (e.g. NMOS or PMOS) is used, so as to simplify the manufacturing process, decrease the volume of echo IC dramatically, and reduce the cost. The matrix of storage cells and related clock signals are rearranged so that and the amplitude of power spikes can be lowered to decrease noise, the frequency of power spikes is also increased so that a low cost filter can be employed.
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