发明名称 System and Method for Providing Full Hardware Support of Collective Operations in a Multi-Tiered Full-Graph Interconnect Architecture
摘要 A method, computer program product, and system are provided for performing collective operations. In hardware of a parent processor in a first processor book, a number of other processors are determined in a same or different processor book of the data processing system that is needed to execute the collective operation, thereby establishing a plurality of processors comprising the parent processor and the other processors. In hardware of the parent processor, the plurality of processors are logically arranged as a plurality of nodes in a hierarchical structure. The collective operation is transmitted to the plurality of processors based on the hierarchical structure. In hardware of the parent processor, results are received from the execution of the collective operation from the other processors, a final result is generated of the collective operation based on the received results, and the final result is output.
申请公布号 US2009063815(A1) 申请公布日期 2009.03.05
申请号 US20070845223 申请日期 2007.08.27
申请人 ARIMILLI LAKSHMINARAYANA B;ARIMILLI RAVI K;RAJAMONY RAMAKRISHNAN;SPEIGHT WILLIAM E 发明人 ARIMILLI LAKSHMINARAYANA B.;ARIMILLI RAVI K.;RAJAMONY RAMAKRISHNAN;SPEIGHT WILLIAM E.
分类号 G06F15/76;G06F9/02 主分类号 G06F15/76
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