发明名称 Buffered Memory Module with Multiple Memory Device Data Interface Ports Supporting Double the Memory Capacity
摘要 A memory system is provided that enhances the memory bandwidth available through a memory module. The memory system includes a memory controller and at least one memory module coupled to the memory controller. In the memory systems, each memory module comprises at least one memory hub device integrated in the memory module. In the memory system, each memory hub device in the memory module comprises a first memory device data interface that communicates with a first set of memory devices and a second memory device data interface that communicates with a second set of memory devices. In the memory system, the first set of memory devices which are separate from the second set of memory devices are communicated with by the memory hub device via the separate first and second memory device data interfaces.
申请公布号 US2009063787(A1) 申请公布日期 2009.03.05
申请号 US20070848318 申请日期 2007.08.31
申请人 GOWER KEVIN C;MAULE WARREN E 发明人 GOWER KEVIN C.;MAULE WARREN E.
分类号 G06F12/00 主分类号 G06F12/00
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