发明名称 |
Cell of Semiconductor Device Having Sub-Wavelength-Sized Gate Electrode Conductive Structures Formed from Linear Shaped Gate Electrode Layout Features Defined Along At Least Four Gate Electrode Tracks with Minimum End-to-End Spacing |
摘要 |
A cell of a semiconductor device is disclosed to include a diffusion level including a plurality of diffusion regions separated by inactive regions. The cell also includes a gate electrode level including conductive features defined to extend in only a first parallel direction. Adjacent ones of the conductive features that share a common line of extent in the first parallel direction are fabricated from respective originating layout features that are separated from each other by an end-to-end spacing having a size that is substantially equal across the gate electrode level region and is minimized to an extent allowed by a semiconductor device manufacturing capability. The gate electrode level includes conductive features defined along at least four different virtual lines of extent in the first parallel direction. A width of the conductive features is less than a wavelength of light used in a photolithography process for their fabrication.
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申请公布号 |
US2010019288(A1) |
申请公布日期 |
2010.01.28 |
申请号 |
US20090572221 |
申请日期 |
2009.10.01 |
申请人 |
TELA INNOVATIONS, INC. |
发明人 |
BECKER SCOTT T.;SMAYLING MICHAEL C. |
分类号 |
H01L27/04 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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