发明名称 Non-volatile static random access memory (NVSRAM) having a shared port
摘要 A nonvolatile memory device includes a shared port block, a plurality of decoded address signals, a read signal, and a read word line. The shared port block includes a shared port communicatively coupled to a block, the block comprising a plurality of memory cells, wherein the shared port is operable to sense a voltage level at each of the plurality of memory cells. The plurality of decoded address signals are communicatively coupled to the block. Each of the plurality of decoded address signals is operable to enable a corresponding one of the plurality of memory cells. The read signal is communicatively coupled to the shared port. The read signal is operable to enable a read operation associated with the block. The read word line signal is communicatively coupled to the shared port block. The read word line signal is operable to enable the read operation.
申请公布号 US9530501(B2) 申请公布日期 2016.12.27
申请号 US201414588177 申请日期 2014.12.31
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 Pelley Perry H.;Baker, Jr. Frank K.;Ramaraju Ravindraraj
分类号 G11C11/00;G11C16/00;G11C11/22;G11C11/24;G11C7/18 主分类号 G11C11/00
代理机构 代理人
主权项 1. A nonvolatile memory device comprising: a shared port block comprising: a block comprising a plurality of memory cells;a shared port communicatively coupled to the block, the shared port comprising: a capacitor having a first terminal coupled to the plurality of memory cells; anda first transistor having a first current electrode coupled to a read bit line, a control electrode coupled to the first terminal of the capacitor, and second current electrode coupled to a power supply terminal;wherein the shared port is operable to sense a voltage level at each of the plurality of memory cells; a plurality of decoded address signals communicatively coupled to the block, each of the plurality of decoded address signals operable to enable a corresponding one of the plurality of memory cells; a read signal communicatively coupled to the shared port, the read signal operable to enable a read operation associated with the block; and a read word line signal communicatively coupled to a second terminal of the capacitor of the shared port, the read word line signal operable to enable the read operation.
地址 Austin TX US