NON-VOLATILE MEMORY (NVM) CELL AND DEVICE STRUCTURE INTEGRATION

摘要

A dielectric layer is formed over the substrate in the capacitor region and the memory region and a select gate layer is formed over the dielectric layer. A select gate is formed over the memory region and a plurality of lines of electrodes over the capacitor region from the select gate layer. A charge storage layer is formed over the capacitor region and the memory region including over the select gate and the plurality of lines. A control gate layer is formed over the charge storage layer over the capacitor region and over the memory region. The control gate layer is patterned to form a control gate of a memory cell over the memory region and a first electrode of a capacitor over the capacitor region. The plurality of lines are connected to the capacitor region to form a second electrode of the capacitor.

主权项

1. A method of making a semiconductor device using a substrate having a capacitor region and a memory region, comprising:
forming a dielectric layer over the substrate in the capacitor region and the memory region; forming a select gate layer over the dielectric layer in the capacitor region and the memory region; forming a select gate over the memory region and a plurality of lines of electrodes over the capacitor region from the select gate layer; forming a charge storage layer over the capacitor region and the memory region including over the select gate and the plurality of lines of electrodes; forming a control gate layer over the charge storage layer over the capacitor region and over the memory region; patterning the control gate layer to form a control gate of a memory cell over the memory region and a first electrode of a capacitor over the capacitor region; and connecting the plurality of lines of electrodes to the capacitor region to form a second electrode of the capacitor.