发明名称 Functional unit having tree structure to support vector sorting algorithm and other algorithms
摘要 An apparatus is described having a functional unit of an instruction execution pipeline. The functional unit has a plurality of compare-and-exchange circuits coupled to network circuitry to implement a vector sorting tree for a vector sorting instruction. Each of the compare-and-exchange circuits has a respective comparison circuit that compares a pair of inputs. Each of the compare-and-exchange circuits have a same sided first output for presenting a higher of the two inputs and a same sided second output for presenting a lower of the two inputs, said comparison circuit to also support said functional unit's execution of a prefix min and/or prefix add instruction.
申请公布号 US9405538(B2) 申请公布日期 2016.08.02
申请号 US201213730685 申请日期 2012.12.28
申请人 Intel Corporation 发明人 Ioffe Robert M.;Galoppo Von Borries Nicholas C.
分类号 G06F9/44;G06F7/38;G06F9/30;G06F9/38;G06F7/24 主分类号 G06F9/44
代理机构 Nicholson De Vos Webster & Elliott, LLP 代理人 Nicholson De Vos Webster & Elliott, LLP
主权项 1. An apparatus comprising: a functional unit of an instruction execution pipeline comprising a plurality of compare-and-exchange circuits in parallel and coupled to network circuitry to execute a single vector sorting instruction to sort an input operand of one or more vectors into numerical order, each of said compare-and-exchange circuits having a respective comparison circuit that compares a pair of inputs, each of said compare-and-exchange circuits having a first output for presenting a higher of the pair of inputs and a second output for presenting a lower of the pair of inputs; and a memory circuit containing microcode that provides control signals to said network circuitry to loopback each output of the plurality of compare-and-exchange circuits into the plurality of compare-and-exchange circuits until each vector of an input operand of a plurality of vectors is sorted.
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