Highly efficient different precision complex multiply accumulate to enhance chip rate functionality in DSSS cellular systems

摘要

This invention is a digital signal processor capable of performing correlation of data with pseudo noise for code division multiple access (CDMA) decoding using clusters. Each cluster includes plural multipliers. The multipliers multiply real and imaginary parts of packed data by corresponding pseudo noise data. Within a cluster the real parts and the imaginary parts of the products are summed separately. This forms plural complex number outputs equal in number to the number of clusters. The pseudo noise data is offset relative to the data input differing amounts for different clusters. The clusters are divided into first half clusters receiving data from even numbered slots and second half clusters receiving data from odd numbered slots. The correlation unit includes a mask input to selectively zero a multiplier product.

主权项

1. A digital signal processor comprising:
a data register file including a plurality of data registers storing data, each data register designated by a corresponding register number; an instruction memory storing instructions each specifying a data processing operation and at least one data operand by register number; an instruction decoder connected to said instruction memory for sequentially recalling instructions from said instruction memory and determining said specified data processing operation and said specified at least one operand; an operational unit connected to said data register file and said instruction decoder for performing data processing operations upon at least one operand corresponding to an instruction decoded by said instruction decoder, said data processing operations including performing a correlation operation comprising plurality of clusters, each cluster producing a complex number output and including
a plurality of complex multipliers, each complex multiplier having a first input receiving corresponding separate real part and imaginary part packed within data stored in a first instruction specified data register, a second input receiving corresponding pseudo noise data packed within data stored in a second instruction specified data register, and a real product output and an imaginary product output,a real summer connected to said real product output of each complex multiplier in said cluster forming a sum of said real product outputs forming a real part of said complex number output, andan imaginary summer connected to said imaginary product output of each complex multiplier in said cluster forming a sum of said imaginary product outputs forming an imaginary part of said complex number output; and wherein said pseudo noise data is offset relative to said separate real and imaginary parts packed within data stored in the first instruction specified data register by a differing amount for different clusters.