发明名称 A METHOD OF FORMING AN INTERCONNECT STRUCTURE ON AN INTEGRATED CIRCUIT DIE
摘要 A method of forming an interconnect structure, comprising forming a first interconnect layer (123) embedded in a first dielectric layer (118), forming a dielectric tantalum nitride barrier (150) by means of atomic layer deposition on the surface of the first interconnect (123), depositing a second dielectric layer (134) over the first interconnect (123) and the barrier (150) and etching a via (154) in the dielectric layer (134) to the barrier (150). The barrier (150) is then exposed to a treatment through the via (154) to change it from the dielectric phase to the conductive phase (180) and the via (154) is subsequently filled with conductive material (123).
申请公布号 WO2006059261(A3) 申请公布日期 2006.08.31
申请号 WO2005IB53892 申请日期 2005.11.24
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V.;BESLING, WIM 发明人 BESLING, WIM
分类号 H01L21/768 主分类号 H01L21/768
代理机构 代理人
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