发明名称 POWER STATE TRANSITIONING PROCEDURE FOR A MULTI-CORE PROCESSOR
摘要 A method is provided for managing power consumption within a multi-core microprocessor. An operating system issues an operating system instruction to transition a recipient core to a targeted power and/or performance state that is one of many possible states into which a microprocessor can place a core. Each core of the microprocessor has its own target state, and different cores may have different target states. After receiving the instruction, the recipient core implements any settings associated with its target core state that wouldn't affect resources shared with other cores. The recipient core also initiates an inter-core discovery process to determine a target multi-core state of all the cores sharing the resource. The target multi-core state reflects one or more settings that match the settings of the recipient core's target core state as much as possible without lowering a performance of any resource-sharing core below that core's own target core state.
申请公布号 US2016179177(A1) 申请公布日期 2016.06.23
申请号 US201514970354 申请日期 2015.12.15
申请人 VIA TECHNOLOGIES, INC. 发明人 HENRY G. GLENN;GASKINS DARIUS D.
分类号 G06F1/32;G06F9/30 主分类号 G06F1/32
代理机构 代理人
主权项 1. A method of managing power consumption within a multi-core microprocessor, the method comprising: issuing an operating-system instruction to transition a recipient core to a target core state associated with one or more settings that would affect a performance and/or power-consuming characteristic of the microprocessor; implementing any settings associated with the target core state for the recipient core that would not affect resources shared with other cores; when the target core state is associated with one or more settings that would affect at least one performance and/or power consuming characteristic of at least one resource shared with one or more resource-sharing cores, determining a target multi-core state of the recipient and resource-sharing cores, wherein the target multi-core state is only associated with one or more settings that match the settings of the recipient core's target core state as much as possible without lowering a performance of any resource-sharing core below the resource sharing core's own target core state; and implementing the one or more settings associated with the target multi-core state.
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