| 摘要 |
<p>The method applies to non-volatile semiconductor memories with cells arranged in rows and in columns, in which each cell has a first terminal (CG), a second terminal (D), and a third terminal (S) connected, respectively, to a row line (WLi), to a column line (BLi), and to a common node by respective connection strips (CG, R). In order to form connections with low resistivity and consequently to save semiconductor area, the method provides for the formation of an oxide layer (I2) which covers the connection strips of the first terminals (CG) and of the third terminals (S), the formation of channels (CH1, CH2) along the connection strips until the surfaces thereof are exposed, and the filling of the channels (CH1, CH2) with a material (W) having a resistivity lower than that of the connection strips. <IMAGE> <IMAGE></p> |
