发明名称 Synchronization with hardware utilizing software clock slaving via a clock
摘要 A sample rate converter (SRC) is used to slave hardware devices to a master hardware device. A clock manager registers the time at each clock of each device, communicates with memory that stores the clock times, and reports correlations between each clock time and the time at a reference clock. The processing of a data stream can be slaved to one or more hardware devices. The processing of a wake up period can be slaved to the clock of the master hardware device by adjusting the wakeup period. Slaving of hardware devices to the master hardware device can also be accomplished by finding a correlation between the clock times in memory and the reference clock. Each correlation can be input into an SRC corresponding to each slave hardware device. Each SRC can then generate or consume a data stream at the actual rate of the corresponding slave hardware device.
申请公布号 US2004187043(A1) 申请公布日期 2004.09.23
申请号 US20030394966 申请日期 2003.03.21
申请人 SWENSON STEVEN E.;HOEKMAN JEFFREY S.;TANNER THEODORE C.;BALLANTYNE JOSEPH C. 发明人 SWENSON STEVEN E.;HOEKMAN JEFFREY S.;TANNER THEODORE C.;BALLANTYNE JOSEPH C.
分类号 G06F1/12;G06F1/14;G06F3/16;H04L12/56;H04N5/04;H04N5/073;H04N5/60;H04N9/64;(IPC1-7):G06F1/12;G06F13/42 主分类号 G06F1/12
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