发明名称 POWER SOURCE NOISE ANALYSIS MODEL GENERATING PROGRAM AND POWER SOURCE NOISE ANALYSIS MODEL GENERATING DEVICE
摘要 PROBLEM TO BE SOLVED: To simplify a power source noise analysis model of a circuit board. SOLUTION: The CAD data of a circuit board is acquired from a CAD device (Figure 3, S21), and power source islands which overlap with each other are extracted as a power source pair (S22), i.e., power source islands in the different layers of the circuit board. Nodes are arranged to the extracted power source pair, and the nodes of the power source pair are projected on the power source islands to which the power source pair belongs (S23). A mesh generation part 24 determines mesh areas, which surround the nodes, for each power source island, and an impedance computation part 25 computes impedances (L, R, C) between the nodes (S24). A model generation part 26 generates a power source noise analysis model based on the impedance between the nodes of the respective layers and the capacity between the layers (S25). COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008165355(A) 申请公布日期 2008.07.17
申请号 JP20060352084 申请日期 2006.12.27
申请人 FUJITSU LTD 发明人 IWAKURA YOSHIYUKI;FUJIMORI SHOGO;HIRAI TENDO;SENDA HITOSHI;KANEI KAZUYOSHI;NIMURA KOTARO
分类号 G06F17/50;H05K3/00 主分类号 G06F17/50
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