| 发明名称 |
REDUCED UNCORRECTABLE MEMORY ERRORS |
| 摘要 |
Uncorrectable memory errors may be reduced by determining a logical array address for a set of memory arrays and transforming the logical array address to at least two unique array addresses based, at least in part, on logical locations of at least two memory arrays within the set of memory arrays. The at least two memory arrays are then accessed using the at least two unique array addresses, respectively. |
| 申请公布号 |
US2016188409(A1) |
申请公布日期 |
2016.06.30 |
| 申请号 |
US201514844843 |
申请日期 |
2015.09.03 |
| 申请人 |
Intel Corporation |
发明人 |
Pangal Kiran;Damle Prashant S.;Sundaram Rajesh;Qawami Shekoufeh;Walker Julie M.;Rivers Doyle |
| 分类号 |
G06F11/10;G06F3/06 |
主分类号 |
G06F11/10 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method to reduce uncorrectable memory errors comprising:
determining a logical array address for a set of memory arrays; transforming the logical array address to at least two unique array addresses based, at least in part, on logical locations of at least two memory arrays within the set of memory arrays; and accessing the at least two memory arrays using the at least two unique array addresses, respectively; wherein said transforming reduces uncorrectable errors in error correction codewords comprising data from the set of memory arrays. |
| 地址 |
Santa Clara CA US |
