Partitionable memory interfaces

摘要

A memory device receives a plurality of read commands and/or write commands in parallel. The memory device transmits data corresponding to respective read commands on respective portions of a data bus and receives data corresponding to respective write commands on respective portions of the data bus. The memory device includes I/O logic to receive the plurality of read commands in parallel, to transmit the data corresponding to the respective read commands on respective portions of the data bus, and to receive the data corresponding to the respective write commands on respective portions of the data bus.

主权项

1. A method, comprising:
in a memory device:
receiving a plurality of read commands in parallel, the receiving comprising receiving a first read command on a first bus and receiving a second read command on a second bus, the first bus separate from the second bus; andtransmitting data corresponding to respective read commands of the plurality of read commands in parallel on respective portions of a data bus, the transmitting comprising transmitting data corresponding to the first read command on a first portion of signal lines of the data bus and transmitting data corresponding to the second read command on a second portion of the signal lines of the data bus, the first portion of the signal lines separate from the second portion of the signal lines.