发明名称 Non-volatile memory for high rewrite cycles application
摘要 A non-volatile memory has an array of non-volatile memory cells. Each of the non-volatile memory cells includes a coupling device formed on a first well, a read device, a floating gate device formed on a second well and coupled to the coupling device, a program device formed on the second well, and an erase device formed on a third well and coupled to the first floating gate device. The read device, the program device, and the erase device are formed on separate wells so as to separate the cycling counts of a read operation, a program operation and an erase operation of the non-volatile memory cell.
申请公布号 US9425204(B2) 申请公布日期 2016.08.23
申请号 US201414271429 申请日期 2014.05.06
申请人 eMemory Technology Inc. 发明人 Ching Wen-Hao;Lai Yen-Hsin;Wang Shih-Chen
分类号 H01L27/115;G11C16/04;H01L29/788;H01L29/51;H01L29/66;H01L29/792;H01L29/06;H01L29/423;G11C16/10;G11C16/24;G11C16/34;G11C16/14;G11C16/26;H01L29/45 主分类号 H01L27/115
代理机构 代理人 Hsu Winston;Margo Scott
主权项 1. A non-volatile memory cell comprising: a coupling device formed on a first well, a second terminal of the coupling device is electrically coupled to a source line; a read device electrically directly connected to the coupling device, a first terminal of the read device is electrically coupled to a first bit line, a gate of the read device is electrically coupled to a first word line; a floating gate device formed on a second well; a program device electrically connected to the floating gate device and formed on the second well, a first terminal of the program device is electrically coupled to a second bit line, a gate of the program device is electrically coupled to a second word line; and an erase device formed on a third well, a first terminal of the erase device is electrically coupled to an erase line; wherein the coupling device, the floating gate device and the erase device are coupled by a common floating gate.
地址 Hsin-Chu TW