Semiconductor structure with dielectric-sealed doped region

摘要

Leakage current can be substantially reduced by the formation of a seal dielectric in place of the conventional junction between source/drain region(s) and the substrate material. Trenches are formed in the substrate and lined with a seal dielectric prior to filling the trenches with semiconductor material. Preferably, the trenches are overfilled and a CMP process planarizes the overfill material. An epitaxial layer can be grown atop the trenches after planarization, if desired.

主权项

1. A structure comprising:
a semiconductor substrate; a first source/drain material disposed in the semiconductor substrate; a first dielectric liner disposed between the first source/drain material and the semiconductor substrate, the first dielectric liner having a bottom portion disposed along a bottom of the first source/drain material and having a sidewall portion disposed along a sidewall of the first source/drain material; a top surface of the first source/drain material, a top surface of the sidewall portion of the first dielectric liner, and a topmost surface of the semiconductor substrate being co-planar; a semiconductor layer over the top surface of the first source/drain material and the top surface of the semiconductor substrate; and a gate structure over the semiconductor layer, wherein a first portion of the semiconductor layer and at least a portion of the first source/drain material form a first source/drain, and a second portion of the semiconductor layer forms a channel.