发明名称 Gain cell semiconductor memory device and driving method thereof
摘要 A memory cell including two transistors and one capacitor, which is known as a gain cell, is improved. One electrode of the capacitor is connected to a bit line, and the other electrode thereof is connected to a drain of a write transistor. A source of the write transistor is connected to a source line. As a result, for example, in the case where a stacked capacitor is used, the one electrode of the capacitor can be part of the bit line. Only one specific write transistor is turned on when a potential of the source line and a potential of the write bit line are set; thus, only one memory cell can be rewritten.
申请公布号 US9443844(B2) 申请公布日期 2016.09.13
申请号 US201213461807 申请日期 2012.05.02
申请人 SEMICONDUCTOR ENERGY LABORATORY CO., LTD. 发明人 Takemura Yasuhiko
分类号 G11C11/24;H01L27/06;G11C11/405;H01L27/108;H01L27/12 主分类号 G11C11/24
代理机构 Robinson Intellectual Property Law Office 代理人 Robinson Intellectual Property Law Office ;Robinson Eric J.
主权项 1. A semiconductor device comprising: a write bit line; a write word line intersecting with the write bit line; a read line; a source line intersecting with the read line; and a memory cell, wherein the memory cell comprises a write transistor, a read transistor, and a capacitor, wherein a gate, a drain, and a source of the write transistor are connected to the write word line, one electrode of the capacitor, and the source line, respectively, wherein a gate, a drain, and a source of the read transistor are connected to the drain of the write transistor, the read line, and the source line, respectively, wherein the other electrode of the capacitor is connected to the write bit line, wherein a potential corresponding to a piece of data to be stored in the memory cell is configured to be supplied to the write bit line, and wherein the potential of the write bit line is configured to be changed when the piece of data stored in the memory cell is rewritten.
地址 Kanagawa-ken JP