| 摘要 |
A P type substrate is provided on a surface thereof with varactor elements. The varactor element has an N well formed on the surface of the P type substrate, and a gate insulating film is formed on the N well, with a polysilicon layer formed further thereon. On the other hand, the varactor element has an N well formed on the surface of the P type substrate, and a gate insulating film, greater than the gate insulating film in thickness, is formed on the N well. The polysilicon layer is then formed on the gate insulating film. Furthermore, the polysilicon layer is connected to a gate terminal, while the N well is connected to an S/D terminal via N<+> diffusion layers.
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