| 主权项 |
1. A computer implemented method for prefetching data for a processor into a first memory, wherein in a recording mode, a prefetching unit of the processor performs the steps of a method comprising:
receiving one or more first addresses from the processor, wherein the one or more first addresses is a load address; filtering the one or more first addresses for removing at least some of the first addresses from a list; providing a recording-list including the filtered one or more first addresses, wherein in a playback mode, the prefetching unit executes:
receiving at least one second address from the processor, wherein the at least one second address is a load address;receiving a playback-list, wherein the playback-list includes all or a subset of the first addresses in the recording-list;comparing the at least one second address with each of the first addresses in the playback-list for identifying a matching address within the playback-list;fetching data, in case a matching address is identified, from a second memory, wherein the fetched data is identified by addresses sequential to the position of the matching address in the playback-list; andtransferring the fetched data to the first memory, wherein the first and the second memory are caches within a multi-level cache of the processor, wherein the prefetchinq unit enters the recording mode upon starting the prefetchinq unit or upon executing a program loop a first time, thereby generating the recording-list and wherein the prefetching unit enters playback-mode in respect to the recording-list executing the program loop. |
