发明名称 DIGITAL SIGNAL PROCESSING DEVICE AND METHOD, DIGITAL SIGNAL PROCESSING SYSTEM
摘要 <p>There are provided in a rate control command a clock rate select subfunction (SYNC SELECT) to which a digital signal receiver side corresponds, a base rate set subfunction (BASE CONFIGURE), a flow rate control (FLOW CONTROL) subfunction, and a capability inquiry subfunction (CAPABILITY INQUIRY). The CAPABILITY INQUIRY subfunction is used to send to a transmitter side a clock rate select state (SYNC SELECT), base rate set state (BASE CONFIGURE), flow rate control state (FLOW CONTROL) . Thereby, a digital signal can be transmitted between specific units positively and successfully. <IMAGE></p>
申请公布号 EP1102455(A1) 申请公布日期 2001.05.23
申请号 EP20000931551 申请日期 2000.05.24
申请人 SONY CORPORATION 发明人 SAKAMOTO, ICHIRO;SATO, MAKOTO
分类号 H04L12/40;G11B20/10;G11B27/034;G11B27/10;(IPC1-7):H04L29/08 主分类号 H04L12/40
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