发明名称 Device and method for reducing standby current in a memory device by disconnecting bit line load devices in unused columns of the memory device from a supply voltage
摘要 Bit line load circuitry that eliminates wasted standby current flowing to an unused (i.e., repaired-out) column in a Static Random Access Memory (SRAM) device includes a fuse or an anti-fuse interposed between one or more PMOS bit line load devices in the unused column and the supply voltage. Blowing the fuse or anti-fuse isolates the bit line load devices from the supply voltage so the devices draw no current, thus reducing the total standby current of the SRAM device. The fuse may be blown with a laser or with excessive current, and the anti-fuse may be blown with excessive voltage.
申请公布号 US2002093866(A1) 申请公布日期 2002.07.18
申请号 US20010032643 申请日期 2001.12.28
申请人 WILKINS JAMES W. 发明人 WILKINS JAMES W.
分类号 G11C7/12;G11C29/00;(IPC1-7):G11C5/00 主分类号 G11C7/12
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