摘要 |
PROBLEM TO BE SOLVED: To obtain a plurality of phase-locked clocks with simple circuit configuration. SOLUTION: In a digital camera configured to convert a signal imaged by a CCD 101 into a digital signal using an A/D converter 102, to process the digital signal using a DSP 103 and to convert the digital signal using video conversion units 104, 106, a plurality of kinds of clocks required for video conversion processing in the video conversion units 104, 106 are produced by a PLL circuit built in the DSP 103, so that mutually phase locked clocks can be applied and deterioration of image quality caused by beat interference can be removed. COPYRIGHT: (C)2006,JPO&NCIPI
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