发明名称 METHOD OF FORMING METAL LINE IN SEMICONDUCTOR DEVICE
摘要 A method for forming a metal interconnection of a semiconductor device is provided to reduce the upper area of a metal interconnection while avoiding damage to a gate by forming a contact hole having a similar profile to a gate under the contact hole by a round etch process so that the upper part of the contact hole is expanded. A plurality of select lines and a plurality of wordlines are formed on a semiconductor substrate(102). An insulation layer(116) is formed on the resultant structure. An etch stop layer can be formed on the semiconductor substrate including the select line, the wordline and the insulation layer. The insulation layer between the select lines is removed to form a contact hole to which a part of the semiconductor substrate is exposed. An ARC(anti-reflective coating) is formed on the insulation layer in a manner that the thickness of the ARC in the periphery of the contact hole is thinner. The ARC and the insulation layer in the periphery of the contact hole are etched to expand the upper part of the contact hole. A conductive material is formed in the contact hole to form a contact plug.
申请公布号 KR100822600(B1) 申请公布日期 2008.04.16
申请号 KR20070044120 申请日期 2007.05.07
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KWON, KEE HEUNG
分类号 H01L21/28 主分类号 H01L21/28
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