发明名称 METHOD FOR PRODUCING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
摘要 A method for producing a semiconductor device includes a first step of forming a first insulating film around a fin-shaped semiconductor layer on a semiconductor substrate; a second step of forming a pillar-shaped semiconductor layer, a first dummy gate, and a first hard mask; a third step of forming a second hard mask, forming a second dummy gate, and forming a first dummy contact; a fourth step of forming a sidewall and forming a metal-semiconductor compound in an upper portion of a second diffusion layer; a fifth step of forming a gate electrode, a gate line, and a first contact; and a sixth step of forming a second contact, a third contact made of a second metal, and a fourth contact made of the second metal.
申请公布号 US2016308046(A1) 申请公布日期 2016.10.20
申请号 US201615191712 申请日期 2016.06.24
申请人 UNISANTIS ELECTRONICS SINGAPORE PTE. LTD. 发明人 MASUOKA FUJIO;NAKAMURA HIROKI
分类号 H01L29/78;H01L21/3205;H01L29/66;H01L27/088;H01L21/8234;H01L21/3213;H01L21/3105;H01L23/528;H01L21/321;H01L21/027 主分类号 H01L29/78
代理机构 代理人
主权项 1. A method for producing a semiconductor device, the method comprising: a first step of forming a fin-shaped semiconductor layer on a semiconductor substrate and forming a first insulating film around the fin-shaped semiconductor layer; a second step, after the first step, of forming a second insulating film around the fin-shaped semiconductor layer, depositing a first polysilicon on the second insulating film, planarizing the first polysilicon, forming a third insulating film on the first polysilicon, forming a second resist for forming a gate line and a pillar-shaped semiconductor layer in a direction perpendicular to a direction in which the fin-shaped semiconductor layer extends, and etching the third insulating film, the first polysilicon, the second insulating film, and the fin-shaped semiconductor layer to form a pillar-shaped semiconductor layer, a first dummy gate formed of the first polysilicon, and a first hard mask formed of the third insulating film; a third step, after the second step, of forming a fourth insulating film around the pillar-shaped semiconductor layer and the first dummy gate, depositing a second polysilicon around the fourth insulating film, planarizing the second polysilicon, etching back the second polysilicon to expose the first hard mask, depositing a sixth insulating film, forming a fourth resist for forming a first dummy contact, etching the sixth insulating film to form a second hard mask on a sidewall of the first hard mask and to form a third hard mask for forming the first dummy contact on the fin-shaped semiconductor layer, etching the second polysilicon so that the second polysilicon is left on sidewalls of the first dummy gate and the pillar-shaped semiconductor layer to form a second dummy gate, and forming the first dummy contact on the fin-shaped semiconductor layer; a fourth step, after the third step, of forming a fifth insulating film around the second dummy gate and the first dummy contact, etching the fifth insulating film into a sidewall shape so that sidewalls formed of the fifth insulating film are formed, forming a second diffusion layer in an upper portion of the fin-shaped semiconductor layer and a lower portion of the pillar-shaped semiconductor layer, and forming a metal-semiconductor compound in an upper portion of the second diffusion layer; a fifth step, after the fourth step, of depositing an interlayer insulating film, performing chemical mechanical polishing to expose upper portions of the second dummy gate, the first dummy gate, and the first dummy contact, removing the second dummy gate, the first dummy gate, and the first dummy contact, removing the second insulating film and the fourth insulating film, forming a first gate insulating film around the pillar-shaped semiconductor layer and on an inner surface of the fifth insulating film in a region where the second dummy gate and the first dummy gate have been present and on an inner surface of the fifth insulating film in a region where the first dummy contact has been present, forming a fifth resist for removing the first gate insulating film at a bottom portion of the region where the first dummy contact has been present, removing the first gate insulating film at a bottom portion of the region where the first dummy contact has been present, depositing a first metal, and etching back the first metal to form a gate electrode, a gate line, and a first contact; and a sixth step, after the fifth step, of depositing a second gate insulating film around the pillar-shaped semiconductor layer, on the gate electrode, on the gate line, and on the first contact, removing a portion of the second gate insulating film on the gate line and the second gate insulating film on the first contact, depositing a second metal, etching back the second metal, removing the second gate insulating film on the pillar-shaped semiconductor layer, depositing a third metal, and etching portions of the third metal and the second metal to form a second contact in which the second metal surrounds a sidewall of an upper portion of the pillar-shaped semiconductor layer, a third contact formed on the gate line and made of the second metal, and a fourth contact formed on the first contact and made of the second metal, wherein the second contact has an upper portion connected to the upper portion of the pillar-shaped semiconductor layer.
地址 Singapore SG