RRAM DEVICE

摘要

The present disclosure relates to an integrated circuit device having an RRAM cell, and an associated method of formation. In some embodiments, the integrated circuit device has a bottom electrode disposed over a lower metal interconnect layer. The integrated circuit device also has a resistance switching layer with a variable resistance located on the bottom electrode, and a top electrode located over the resistance switching layer. The integrated circuit device also has a self-sputtering spacer having a lateral portion that surrounds the bottom electrode at a position that is vertically disposed between the resistance switching layer and a bottom etch stop layer and a vertical portion abutting sidewalls of the resistance switching layer and the top electrode. The integrated circuit device also has a top etch stop layer located over the bottom etch stop layer abutting sidewalls of the self-sputtering spacer and overlying the top electrode.

主权项

1. An integrated circuit device, comprising:
a bottom electrode overlying a lower inter-level dielectric (ILD) layer; a bottom etch stop layer laterally surrounding the bottom electrode; a resistance switching layer having a variable resistance, which is disposed over the bottom electrode; a top electrode disposed over the resistance switching layer; a self-sputtering spacer having a lateral portion that surrounds the bottom electrode at a position that is vertically disposed between the resistance switching layer and the bottom etch stop layer and a vertical portion abutting sidewalls of the resistance switching layer and the top electrode; and a top etch stop layer disposed over the bottom etch stop layer along sidewalls of the self-sputtering spacer and extending over a top surface of the top electrode.