发明名称 |
Digital video signal processing apparatus |
摘要 |
<p>A signal-processing apparatus comprises an instruction-parallel processor (100), a first data-parallel processor (101), a second data-parallel processor (102), and a motion detection unit (103), a de-blocking filtering unit (104) and a variable-length coding/decoding unit (105) which are dedicated hardware. With this structure, in signal processing of an image compression and decompression algorithm with a large processing amount, the load is distributed between software and hardware, so that the signal-processing apparatus can realize high processing capability and flexibility.</p> |
申请公布号 |
EP1509044(A2) |
申请公布日期 |
2005.02.23 |
申请号 |
EP20040019387 |
申请日期 |
2004.08.16 |
申请人 |
PANASONIC CORPORATION |
发明人 |
KATAOKA, TOMONORI;NISHIDA, HIDESHI;KIMURA, KOUZOU;HIGAKI, NOBUO;KIYOHARA, TOKUZO |
分类号 |
G06T1/60;G06F15/80;G06T1/20;H04N5/92;H04N7/24;H04N19/136;H04N19/42;H04N19/436;H04N19/50;H04N19/503;H04N19/51;H04N19/523;H04N19/61;H04N19/625;H04N19/70;H04N19/80;H04N19/91;(IPC1-7):H04N7/26 |
主分类号 |
G06T1/60 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|