Semiconductor memory particularly integrated semiconductor memories, has storage cells arranged in cells and slots, bit line pairs with reverse and non reverse bit lines, sense-amplifier assigned to bit line pair and control circuits

摘要

The semi conductor memory has storage cells arranged in cells and slots, bit line pairs with a reverse and non reverse bit lines, a sense-amplifier assigned to a bit line pair and control circuits for controlling the sense-amplifiers respectively. A preamplifier (60) is formed to assign each sense-amplifier. A main amplifier of a sense amplifier has an evaluation unit for logic 0 and logic 1 and that the preamplifier assigned to the sense-amplifier is assigned to one of the concerned evaluated units. An independent claim is also included for a method for the operation of a semi conductor memory.