发明名称 Memory device
摘要 A memory device including: a memory cell array including normal memory cells and spare memory cells arranged in rows and columns including normal columns including the normal memory cells and at least one spare column including spare memory cells, a segment match determining circuit configured to compare a segment address with row address information corresponding to a failed segment and to generate a load control signal, and a column match determining circuit configured to compare column address information corresponding to a failed column in response to the load control signal with a column address and to generate a column address replacement control signal, wherein the memory cells connected to fail columns of the fail segment are replaced with memory cells connected to columns of the spare memory cells in response to the column address replacement control signal.
申请公布号 US9412470(B2) 申请公布日期 2016.08.09
申请号 US201514590717 申请日期 2015.01.06
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 Son Jong-pil;Sohn Young-soo
分类号 G11C29/04;G11C11/408;G11C29/44;G11C29/00;G11C17/16;G11C8/00;G11C16/08 主分类号 G11C29/04
代理机构 Muir Patent Law, PLLC 代理人 Muir Patent Law, PLLC
主权项 1. A memory device comprising: a memory cell array comprising a plurality of memory cells arranged in rows and columns, wherein the rows are divided into a plurality of segments and the columns are divided into a normal cell area and a spare cell area; and a repair circuit that varies a number of the plurality of segments and replaces defective cells in the normal cell area with a plurality of spare cells included in units of the plurality of segments in the spare cell area, wherein each of the normal cell area and the spare cell area includes the same number of the plurality of segments.
地址 Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do KR