发明名称 DATA PROCESSING APPARATUS AND DATA PROCESSING SYSTEM
摘要 <p><P>PROBLEM TO BE SOLVED: To prevent decrease in throughput performance called "jamming" in a memory device. <P>SOLUTION: A data processing apparatus is provided with a timing generation part 503 which gives, based on a request signal 101 output for each unit of data processing from a data processing part 100, an output timing for a burst transfer request to a burst transfer request generation part 200. Based on the relationship in size between a lapsed time from the output of the burst transfer request to the activation of the request signal and a time specified by a set threshold value of a threshold value register, the timing generation part controls output timing for a burst transfer request 301. When the lapsed time exceeds the time specified by a maximum threshold value, the burst transfer request generation part is given an output timing for the burst transfer request without waiting for the activation of the request signal. As a result, when the issuance of the request signal is delayed, a next burst transfer request can be given to the memory device without waiting for the issuance but preceding it. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009134392(A) 申请公布日期 2009.06.18
申请号 JP20070308348 申请日期 2007.11.29
申请人 RENESAS TECHNOLOGY CORP 发明人 HONMA KAZUKI;KENGAKU TOORU
分类号 G06F12/00 主分类号 G06F12/00
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