发明名称 |
SELF-ALIGNED GATED EMITTER TIP ARRAYS |
摘要 |
Methods for fabrication of self-aligned gated tip arrays are described. The methods are performed on a multilayer structure that includes a substrate, an intermediate layer that includes a dielectric material disposed over at least a portion of the substrate, and at least one gate electrode layer disposed over at least a portion of the intermediate layer. The method includes forming a via through at least a portion of the at least one gate electrode layer. The via through the at least one gate electrode layer defines a gate aperture. The method also includes etching at least a portion of the intermediate layer proximate to the gate aperture such that an emitter structure at least partially surrounded by a trench is formed in the multilayer structure. |
申请公布号 |
US2016254114(A1) |
申请公布日期 |
2016.09.01 |
申请号 |
US201514935993 |
申请日期 |
2015.11.09 |
申请人 |
Massachusetts Institute of Technology |
发明人 |
Fomani Arash Akhavan;Velasquez-Garcia Luis Fernando;Akinwande Akintunde I. |
分类号 |
H01J9/02;H01J1/304 |
主分类号 |
H01J9/02 |
代理机构 |
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代理人 |
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主权项 |
1. A method for forming a self-aligned gated emitter cell, comprising:
providing a multilayer structure, comprising:
a substrate;an intermediate layer comprising a dielectric material disposed over at least a portion of the substrate; andat least one gate electrode layer disposed over at least a portion of the intermediate layer; forming a via through at least a portion of the at least one gate electrode layer, wherein the via through the at least one gate electrode layer defines a gate aperture; and etching at least a portion of the intermediate layer proximate to the gate aperture such that an emitter structure at least partially surrounded by a trench is formed in the multilayer structure. |
地址 |
Cambridge MA US |