Semiconductor device and method for manufacturing the same

摘要

Provided is a bottom-gate transistor including an oxide semiconductor, in which electric-field concentration which might occur in the vicinity of an end portion of a drain electrode layer (and the vicinity of an end portion of a source electrode layer) when a high gate voltage is applied to a gate electrode layer is reduced and degradation of switching characteristics is suppressed, so that the reliability is improved. The cross-sectional shape of an insulating layer which overlaps over a channel formation region is a tapered shape. The thickness of the insulating layer which overlaps over the channel formation region is 0.3 μm or less, preferably 5 nm or more and 0.1 μm or less. The taper angle θ of a lower end portion of the cross-sectional shape of the insulating layer which overlaps over the channel formation region is 60° or smaller, preferably 45° or smaller, further preferably 30° or smaller.

主权项

1. A semiconductor device comprising:
a gate electrode layer over an insulating surface; a gate insulating film over the gate electrode layer; an oxide semiconductor film comprising a channel formation region over the gate insulating film; an insulating layer over and in contact with the oxide semiconductor film; a source electrode layer having an end portion over the insulating layer; and a drain electrode layer having an end portion over the insulating layer, wherein the end portion of the source electrode layer and the end portion of the drain electrode layer overlap with the channel formation region, wherein the source electrode layer is in direct contact with a surface of the oxide semiconductor film through a first opening, wherein the drain electrode layer is in direct contact with the surface of the oxide semiconductor film through a second opening, wherein the first opening comprises a first portion and a second portion, wherein the first portion of the first opening overlaps with the gate electrode layer and the second portion of the first opening does not overlap with the gate electrode layer, and wherein an angle between a side surface of an end portion of the insulating layer and the insulating surface is smaller than or equal to 60°.