| 摘要 |
Disclosed examples include amplifier circuits (100) with a first stage (AS1) to amplify an input voltage signal (INP, INM) according to a first stage gain to provide a first stage output voltage signal (VOUT1), and a second stage (AS2) to provide an amplifier output voltage signal (VOUT). A bias circuit (114, 120) provides an amplifier bias current signal (IAMP) to a current mirror circuit (CM1, CM2) coupled with the first stage (ASl) to control a first stage bias current (I1), and an adjustment circuit (120) to reduce the amplifier bias current signal (IAMP) and increase the first stage gain when the input voltage signal (INP, INM) is near a first supply voltage (AVDD) or a second supply voltage (GND). |
