发明名称 TEST SYSTEM AND METHOD
摘要 A test system includes a memory device having a data I/O circuit connected to a data write-in path and a data read-out path. During test mode, the data I/O circuit retains a copy of test pattern data received in the I/O circuit via the data write-in path as output test data before the test pattern data is stored in a memory cell array as write data. The test system also includes a test device generating the test pattern data, receiving the output test data from the memory device, comparing the output test data with the test pattern data, and generating an error detection signal on the basis of the comparison. The error detection signal indicates the presence or absence of a defect in the data write-in or read-out path.
申请公布号 US2010023817(A1) 申请公布日期 2010.01.28
申请号 US20090499977 申请日期 2009.07.09
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK JAE-WOO;JEONG JAE-YONG
分类号 G11C29/04;G06F11/22 主分类号 G11C29/04
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