| 摘要 |
A semiconductor memory device comprises: a decoding control unit configured to generate a first decoding control signal and a second decoding control signal in response to a double enable signal and a first address; and a decoding unit configured to enable only one among a plurality of wordlines or simultaneously enable at least two wordlines among the wordlines, in response to the first and second decoding control signals and a second address. Therefore, the semiconductor memory device can increase a storage capacity and storage reliability of data in accordance with a usage purpose. |
