| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a wiring board capable of coping with enhancement in function (multi-pin) and miniaturization of a semiconductor device. <P>SOLUTION: In a region between a chip mounting region (a periphery of a semiconductor chip 3) on the upper surface of a wiring board 2 and the periphery of the wiring board 2, a plurality of bonding leads 13 are arranged in three lines along each side of the wiring board 2. An outside wiring A2a that runs between the bonding leads 13, adjoining each other, among bonding leads LG1 on a first line, in plan view, as well as an inside wiring A2b that runs between the bonding leads 13, adjoining each other, among bonding leads LG3 on a third line, are connected to the plurality of bonding leads 13 among bonding leads LG2 of a second line at the center. <P>COPYRIGHT: (C)2012,JPO&INPIT |
