| 摘要 |
A first polysilicon layer is formed on a substrate, and vacancies are introduced into an upper portion of the first polysilicon layer, thereby forming a second polysilicon layer. Then, a third polysilicon layer is formed on the second polysilicon layer. After depositing a silicon oxide film and a polysilicon film for a gate on the third polysilicon layer, these films are made into a pattern, thereby forming a control gate electrode and a gate oxide film. Impurity ions are then implanted, thereby forming source/drain regions. Thus, a channel region including the second polysilicon layer with the vacancies introduced is disposed below the control gate electrode, and hence, the mobility of a carrier in the channel region can be improved. As a result, a device can be operated at a high speed with a low voltage.
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