发明名称 ARCHITECTURE FOR MULTI-STAGE DECODING OF A CABAC BITSTREAM
摘要 <p>Techniques for optimizing the Context-based Adaptive Binary Arithmetic Coding (CABAC) bitstream decoding are disclosed. In one configuration, a device has a first processing circuit operative to decode a Context-based Adaptive Binary Arithmetic Coding (CABAC) bitstream into an intermediate signal having a CABAC decoded standard format and a decoded order. A second processing circuit decodes the intermediate signal using a non-CABAC decoding standard. A buffer is provided between the first and second processing circuits to improve processing speeds.</p>
申请公布号 WO2009029797(A1) 申请公布日期 2009.03.05
申请号 WO2008US74796 申请日期 2008.08.29
申请人 QUALCOMM INCORPORATED;BAO, YILIANG;YOSHINO, TOSHIAKI;WANG, KAI 发明人 BAO, YILIANG;YOSHINO, TOSHIAKI;WANG, KAI
分类号 H04N7/26;H03M7/40 主分类号 H04N7/26
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