发明名称 FACILITATING DYNAMIC PIPELINING OF WORKLOAD EXECUTIONS ON GRAPHICS PROCESSING UNITS ON COMPUTING DEVICES
摘要 A mechanism is described for facilitating dynamic pipelining of workload executions at graphics processing units on computing devices. A method of embodiments, as described herein, includes generating a command buffer having a plurality of kernels relating to a plurality of workloads to be executed at a graphics processing unit (GPU), and pipelining the workloads to be processed at the GPU, where pipelining includes scheduling each kernel to be executed on the GPU based on at least one of availability of resource threads and status of one or more dependency events relating to each kernel in relation to other kernels of the plurality of kernels.
申请公布号 WO2016099653(A1) 申请公布日期 2016.06.23
申请号 WO2015US56652 申请日期 2015.10.21
申请人 INTEL CORPORATION 发明人 RAO, JAYANTH N.;LANKA, PAVAN K.
分类号 G06T1/20;G06F9/38 主分类号 G06T1/20
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