发明名称 NITRIDE SEMICONDUCTOR DEVICE
摘要 A nitride semiconductor device includes: a conductive substrate; a first nitride semiconductor which is formed on the substrate and contains Ga or Al; an electron supply layer which is formed in contact with the first nitride semiconductor layer and is made of a second nitride semiconductor having a different composition from that of the first nitride semiconductor layer in an interface between the electron supply layer and the first nitride semiconductor layer; and a source, a gate and a drain or an anode and a cathode which are formed on a front surface of the substrate, wherein the first nitride semiconductor layer has a thickness of w or more, a deep acceptor concentration distribution NDA(z) and a shallow acceptor concentration distribution NA(z), which satisfy the following equations (1) to (3):;∫0w{Ec(x)-∫0wq(NDA(z)+NA(z))ɛ0ɛ}z≧Vb(1)Ec(x)=3.3×106×x+12×106×(1-x)(2)E(z)=Ec(x)-∫0wq(NDA(z)+NA(z))ɛ0ɛx.(3)
申请公布号 US2016282289(A1) 申请公布日期 2016.09.29
申请号 US201615080403 申请日期 2016.03.24
申请人 ROHM CO., LTD. 发明人 TANAKA Taketoshi
分类号 G01N27/04;H01L29/861;H01L29/778;H01L29/205 主分类号 G01N27/04
代理机构 代理人
主权项 1. A nitride semiconductor device comprising: a conductive substrate; a first nitride semiconductor which is formed on the substrate and contains Ga or Al; an electron supply layer which is formed in contact with the first nitride semiconductor layer and is made of a second nitride semiconductor having a different composition from that of the first nitride semiconductor layer in an interface between the electron supply layer and the first nitride semiconductor layer; and a source, a gate and a drain or an anode and a cathode which are formed on a front surface of the substrate, wherein the first nitride semiconductor layer has a thickness of w or more, a deep acceptor concentration distribution NDA(z) and a shallow acceptor concentration distribution NA(z), which satisfy the following equations (1) to (3):∫0w{Ec(x)-∫0wq(NDA(z)+NA(z))ɛ0ɛ}z≧Vb(1)Ec(x)=3.3×106×x+12×106×(1-x)(2)E(z)=Ec(x)-∫0wq(NDA(z)+NA(z))ɛ0ɛx,(3) where q represents an elementary charge quantity, ε0 represents a dielectric constant of vacuum, ε represents a relative dielectric constant of the first nitride semiconductor layer, Vb represents a dielectric breakdown voltage of the device, and Ec(x) represents a dielectric breakdown electric field in the bottom of the first nitride semiconductor layer, wherein, in the equation (1), a Z axis represents an axis of the thickness direction with the bottom of the first nitride semiconductor layer as an origin, wherein, in the equation (2), x represents an element ratio of Ga and Al in the bottom of the first nitride semiconductor layer, which is expressed as x=Ga/(Ga+Al), and wherein, in the equation (3), w represents a value making E(w) equal to 0.
地址 Kyoto JP