发明名称 |
DESIGN AND METHOD FOR STABILIZING VCSEL OF CHIP SCALE ATOMIC CLOCK |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a method for constructing a chip scale atomic clock in which the clock frequency is stable. <P>SOLUTION: A chip scale atomic clock includes a vertical resonator surface light generating laser 110 and at least one further component 120 and operatively positions the at least one further component 120 at a stage 100 and arranging the radiation surface 119 of the vertical resonator surface light generating laser to be nonparallel to a partial reflection surface 1 and a partial reflection surface 2 of the at least further component 120, thereby leading reflection light 301 and reflection light 304 coming respectively from the partial reflection surface 1 and the partial reflection surface 2 in the direction in which the lights move apart from the vertical resonator surface light generating laser 110. <P>COPYRIGHT: (C)2012,JPO&INPIT |
申请公布号 |
JP2011237401(A) |
申请公布日期 |
2011.11.24 |
申请号 |
JP20100252835 |
申请日期 |
2010.11.11 |
申请人 |
HONEYWELL INTERNATL INC |
发明人 |
YOUNGNER DANIEL W;SONG TAE RU;RIDLEY JEFF A |
分类号 |
G04F5/14;H01S1/06;H01S5/022 |
主分类号 |
G04F5/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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