PROCESSING OF EVENTS FOR ACCELERATORS UTILIZED FOR PARALLEL PROCESSING

摘要

According to embodiments of the present invention, machines, systems, methods and computer program products for processing events including efficiently processing interrupt service requests for peripheral devices, such as hardware accelerators, utilized in parallel processing are provided. For each core engine of a peripheral device, the peripheral device detects whether one or more interrupt signals have been generated. Information associated with the one or more interrupt signals are stored in one or more registers of peripheral device memory, for each core engine. The information is aggregated and stored in a vector of registers in the peripheral device memory, and the aggregated information is written to memory associated with a CPU to enable CPU processing of interrupt requests from each core engine of the peripheral device.

主权项

1. A computer-implemented method for managing interrupt signals at a peripheral device comprising:
detecting at the peripheral device that an interrupt request has been generated at one or more core engines of the peripheral device; storing in one or more registers of a peripheral device memory for each core engine, information associated with the interrupt request; aggregating the information associated with the interrupt request, for each core engine, into a vector of registers in the peripheral device memory; and writing the aggregated information to memory associated with a Central Processing Unit (CPU) of a host machine to enable CPU processing of interrupt requests from each core engine of the peripheral device.